In an N-channel JFET (Junction Field-Effect Transistor), the gate is reverse-biased when a negative voltage is applied to it while a positive voltage is applied to the drain or source. This reverse bias increases the depletion region at the gate junction, effectively constricting the channel through which current can flow.
As the gate voltage becomes more negative, the depletion region widens, which reduces the number of charge carriers (electrons) available in the channel. Since there are fewer carriers in the conduction channel, the resistance across the device increases. Therefore, the internal resistance of the JFET becomes high as a result of this increased depletion region and reduced electron flow.
This behavior is a fundamental characteristic of JFETs and differentiates them from other types of transistors, such as bipolar junction transistors (BJTs), which operate through different mechanisms. Understanding this aspect is crucial when designing circuits that utilize JFETs for switching or amplification applications, as the resistance affects the device's efficiency and performance.